A 1.3V 26mW 3.2GS/S Undersampled LC Bandpass ∑△ ADC for a SDR ISM-band Receiver in 130nm CMOS

摘要

This paper presents the implementation of an un-dersampled LC bandpass ∑△ ADC with a raised-cosine feedback DAC. It directly converts after the LNA a signal centered in the ISM band at 2.442GHz with a sampling frequency of 3.256GHz. This circuit has been fabricated in a 130nm CMOS process, it occupies an area of 0.27mm{sup}2 and is operating at a supply voltage of 1.3V. The Signal-to-Noise and Distortion Ratios measured are 34dB, 37dB and 42dB for respective bandwidths of 25MHz, 10MHz and 1MHz. The power consumption of the ∑△ ADC is 26mW and its figure of merit is 2.3pJ/bit.