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A two phase clock controlled SC inductance simulation circuit realized with one unity gain buffer

机译:一个两个相位时钟控制的SC电感仿真电路,用一个单位增益缓冲区实现

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摘要

A switched-capacitor (SC) inductance simulation circuit that simulates floating inductance using only one unity gain buffer (UGB) and is controlled by a two-phase clock is described. It is based on the bilinear s-to-Z transformation. A comparison between this and an SC inductor proposed previously by the author (IEEE Int. Symp. on Circ. & Syst. p.2237-9, 1988) is discussed. Experimental results for a third-order low-pass filter using the proposed SC inductor are described.
机译:描述仅使用一个单位增益缓冲器(UGB)模拟浮动电感的开关电容(SC)电感仿真电路,并由两相时钟控制。它基于双线性S-to-Z转化。作者先前提出的这个和SC电感的比较(IEEE int。Symp。在CIRC上。&SYST。讨论了第2237-9,1988)。描述了使用所提出的SC电感器的三阶低通滤波器的实验结果。

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