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A 0.084 Nonlinearity Open-Loop Capacitive Micro-accelerometer With On-Chip Digital Nonlinearity Calibration and Embedded EEPROM

机译:具有片上数字非线性校准和嵌入式EEPROM的0.084%的非线性开环电容微加速度计

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A high-precision digital readout interface for a ±15g open-loop MEMS capacitive accelerometer is present in this paper. The differential capacitance resulting from input acceleration is picked up by a low-noise switch-capacitor (SC) charge sensitive amplifier (CSA) and further digitized by a 2nd-order Σ-∆ ADC after amplification. In order to reduce the nonlinearity of the open-loop accelerometer with high mechanical sensitivity, a digital nonlinearity calibration system is implemented on chip with a 32×8-bit embedded EEPROM for parameters storage. Newton-Raphson iteration algorithm is utilized for compensation parameter calculation, and serial processing as well as floating-point operation is used for hardware overhead reduction. The interface designed in a 0.35-µm 3.3V/14V embedded EEPROM CMOS process occupies 12.14 mm2 and draws 11.1mA from a 3.3-V supply. The measured original nonlinearity of the accelerometer is 0.32%, while it is reduced to 0.084% after the compensation parameters are written into EEPROM. Moreover,√ the accelerometer system achieves a noise floor of 5.5µg/√Hz over a 200-Hz bandwidth and a bias instability (BI) of 5.13µg.
机译:本文存在高精度数字读数接口,用于±15G开环MEMS电容式加速度计。由输入加速产生的差分电容由低噪声开关 - 电容(SC)电荷敏感放大器(CSA)拾取,并进一步数字化由2 nd - 放大后Σ-δADC。为了降低具有高机械灵敏度的开环加速度计的非线性,在芯片上实现了数字非线性校准系统,具有32×8位嵌入式EEPROM,用于参数存储。 Newton-Raphson迭代算法用于补偿参数计算,并且串行处理以及浮点操作用于硬件开销减小。界面设计为0.35-μm3.3V / 14V嵌入式EEPROM CMOS工艺占12.14毫米 2 并从3.3V供电中绘制11.1MA。加速度计的测量原始非线性为0.32%,而在补偿参数写入EEPROM之后,它减少到0.084%。此外,加速度计系统通过200 Hz带宽(5.13μg)实现5.5μg/√Hz的噪声底板。

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