Wafer Level Approach for the Investigation of the Long-Term Stability of Resistive Platinum Devices at Elevated Temperatures

摘要

In this work, we present a new wafer level based approach to evaluate the long-term stability of thin film platinum resistors. This approach enables on the one hand the evaluation of hundreds of devices manufactured with the same processes parameters and exposed to the same stress conditions. Thus, statistical relevant conclusions can be drawn with respect to drift levels in the sub-percent range. On the other hand, the drift pattern on the wafer gives hints to the cause of drift. First investigations with this new approach show a significant influence of the silicon oxide stoichiometry of silicon-rich oxide cover layers on platinum resistors at stress temperatures of only 140°C to 250°C.