This paper presents the analysis and design of a triple-band low-noise amplifier (LNA) fabricated in a 0.18 urn CMOS process. The triple-band operation is achieved by adding a switch component in a dual-band input network of an LNA, so that it can function at 2.5, 3.5, and 5.2 GHz. The proposed method can effectively decrease the chip area as compared to conventional designs. In addition, based on the design procedures provided in this paper, the component values of the triple-band input network can be accurately calculated to reduce the complication of the circuit design.
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