A 10 Gbps Burst-Mode Clock and Data Recovery Circuit with Continuous Clock Output

摘要

This paper presents a 10-Gbps burst-mode clock and data recovery (BM-CDR) circuit based on the phase picking method. Experiment demonstrates the proposed BM-CDR circuit is able to align the burst-mode incoming data to the local clock with a maximum phase misalignment of ±Π/8 within 20 ns.