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A cost-efficient 28nm split-gate eFLASH memory featuring a HKMG hybrid bit cell and HV device

机译:一种成本效益的28nm拆分门EFLASH存储器,具有HKMG混合位单元和HV设备

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We demonstrate for the first time the integration of the proven SuperFlash? bit cell into 28nm High-K Metal Gate (HKMG) technology, incorporating logic HKMG into the flash cell. Flash cell and high-voltage (HV) devices are implemented into a cost-optimized process flow saving seven masks compared to other 28nm eFLASH technologies. Comparable program/erase (P/E) endurance of up to one million cycles at 125°C is shown and program disturb characteristics meets array operation requirements. The Wordline transistor exhibits no degradation in sub-threshold slope of the post 100k P/E cycling, demonstrating robust reliability despite the introduction of HKMG into the flash cell. Additionally, the HKMG based HV devices demonstrate performance similar to platforms without HKMG material.
机译:我们首次展示了经过验证的超级流动的整合 位细胞进入28nm高k金属栅极(HKMG)技术,将逻辑HKMG融入闪存单元中。与其他28nm EFLASH技术相比,闪存电池和高压(HV)器件被实现为节省成本优化的过程流程,节省了七个面罩。相当的程序/擦除(P / E)在125°C时耐高达一百万个循环,并且程序干扰特性符合阵列操作要求。圆形线晶体管在柱100K P / E循环的子阈值斜率上表现出劣化,尽管将HKMG引入闪存单元,但仍然稳健可靠性。另外,基于HKMG的HKMG的HV设备展示了与没有HKMG材料的平台类似的性能。

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