首页> 外文会议>IEEE International Electron Devices Meeting >Highly compact 1T-1R architecture (4F2 footprint) involving fully CMOS compatible vertical GAA nano-pillar transistors and oxide-based RRAM cells exhibiting excellent NVM properties and ultra-low power operation
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Highly compact 1T-1R architecture (4F2 footprint) involving fully CMOS compatible vertical GAA nano-pillar transistors and oxide-based RRAM cells exhibiting excellent NVM properties and ultra-low power operation

机译:高度紧凑的1T-1R架构(4F 2 占板面积),包括完全兼容CMOS的垂直GAA纳米柱晶体管和基于氧化物的RRAM单元,具有出色的NVM性能和超低功耗运行

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For the first time, nano-meter-scaled 1T-1R non-volatile memory (NVM) architecture comprising of RRAM cells built on vertical GAA nano-pillar transistors, either junction-less or junction-based, is systematically investigated. Transistors are fabricated using fully CMOS compatible technology and RRAM cells are stacked onto the tip of the nano-pillars (with a diameter down to ∼37nm) to achieve a compact 4F2 footprint. In addition, through this platform, different RRAM stacks comprising CMOS friendly materials are studied, and it is found that TiN/Ni/HfO2+-Si RRAM cells show excellent switching properties in either bipolar or unipolar mode, including (1) ultra-low switching current/power: SET ∼20nA/85nW and RESET ∼200pA/700pW, (2) multi-level switchability, (3) good endurance, >105, (4) satisfactory retention, 10 years at 85oC; and (5) fast switching speed ∼50ns. Moreover, this vertical (gate-all-around) GAA nano-pillar based 1T-1R architecture provides a more direct and flexible test vehicle to verify the scalability and functionality of RRAM candidates with a dimension close to actual application.
机译:首次系统地研究了纳米尺度的1T-1R非易失性存储器(NVM)架构,该架构包括基于垂直GAA纳米柱晶体管(无结或基于结)构建的RRAM单元。晶体管采用完全兼容CMOS的技术制造,RRAM单元堆叠在纳米柱的尖端(直径低至约37nm)上,以实现紧凑的4F 2 占位面积。此外,通过该平台,研究了包含CMOS友好材料的不同RRAM堆栈,发现TiN / Ni / HfO 2 / n + -Si RRAM单元在双极或单极中均显示出出色的开关性能模式,包括(1)超低开关电流/功率:SET 〜20nA / 85nW和RESET 〜200pA / 700pW,(2)多级开关性,(3)持久性,> 10 5 ,(4)令人满意的保留度,在85 o C下可保存10年; (5)快速切换速度〜50ns。此外,这种基于GAA纳米柱的垂直(全方位门)1T-1R体系结构提供了更直接,更灵活的测试工具,可以验证RRAM候选对象的可扩展性和功能性,使其尺寸接近于实际应用。

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