3D IC stacking offers unique opportunities to extend the number of functions per package beyond conventional chip design architectures. A critical requirement for the reliability of such high density high heat flux devices is adequate thermal management in order to ensure the junction temperatures fall within the acceptable limit. Additional constraints are related with the through silicon via (TSV) placements and compactness of the system. Liquid cooling with integrated micro-channels is a promising technology to meet these demands; however, the modeling and determining the optimal design of these channels is challenging. In this paper, a fluid-fin coupled model for heat sink temperature has been derived in explicit and easy to use form, and its feasibility for geometrical optimization has been demonstrated with a design case of 3D IC from previous literature.
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