首页> 外文会议>2011 7th Conference on Ph.D. Research in Microelectronics and Electronics >Output stage topologies of DC-DC buck converters operating up to 5 V supply voltage in 65 nm CMOS
【24h】

Output stage topologies of DC-DC buck converters operating up to 5 V supply voltage in 65 nm CMOS

机译:DC-DC降压转换器的输出级拓扑在65 nm CMOS中工作高达5 V的电源电压

获取原文
获取外文期刊封面目录资料

摘要

In this paper different output stage topologies for DC-DC buck converters in 65 nm CMOS technology operating in Pulse Width Modulation - Discontinuous Conduction Mode for battery voltages up to 5 V are compared. The paper shows which parameters of the power transistors have to be considered for highly efficient DC-DC buck converter designs. Furthermore the different output stage topologies are compared in terms of losses. By means of the presented evaluation procedure the best output stage topology for a given technology can be found.
机译:本文比较了在65纳米CMOS技术中以脉冲宽度调制-电池电压最高为5 V的不连续传导模式工作的DC-DC降压转换器的不同输出级拓扑。本文显示了高效DC-DC降压转换器设计必须考虑的功率晶体管参数。此外,根据损耗比较了不同的输出级拓扑。通过提出的评估程序,可以找到给定技术的最佳输出级拓扑。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号