15bit Time-to-Digital Converters with 0.9 DNLrms and 160ns FSR for single-photon imagers

摘要

We present a high precision Time-to-Digital Converter (TDC) architecture suitable for multi-channel implementations in monolithic arrays of single-photon avalanche diode (SPAD) detectors aimed at TCSPC applications (like FLIM, FCS, FRET), but also at photon timing and direct TOF measurements for 3D ranging applications (e.g. in LIDAR systems). A “smart-pixel” with a SPAD detector, an analog sensing and driving electronics and a TDC is able to detect single photons and to measure and record in-pixel the time delay between a START pulse (e.g., laser excitation, cell stimulus, or LIDAR flash) and a STOP pulse given by the detection of a single photon (e. g., fluorescence decay signal or back reflection from an object). We report on the design and characterization of prototype chips, fabricated in a 0.35 µm standard CMOS technology. With a 100 MHz reference clock, the TDC provides a time-resolution of 10 ps, a dynamic range of 160 ns and DNL < 1 % LSB rms.