0.1 – 10 GHz 0.5W high efficiency single transistor GaAs pHEMT power amplifier design using load-pull simulations

摘要

In this study, a linear single transistor power amplifier with 0.1 – 10 GHz, 0.5W output power at 1dB compression point (P1dB) and >45% power added efficiency (PAE) is designed. By using a graphical load-pull approach to obtain uniform distrubution for both P1dB and PAE, it is showed that the designed amplifier has its advantage over a classical load line mathched amplifier. UMS 900mW/mm 0.25µm GaAs pHEMT technology and ADS design environment is used to fullfill overall design and simulations.