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Hardware implementation of simultaneous M mutually orthogonal complementary sets of sequences algorithms

机译:同时M个相互正交的互补序列集算法的硬件实现

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This work presents the implementation of improved architectures for simultaneous generation and correlation of mutually orthogonal complementary sets of sequences. By taking advantage of some redundancies in the generation and correlation algorithms, resources consumption is reduced and the performance of such architectures improved. The FPGA implementations performed with generic parameters is evaluated and compared with previous proposals.
机译:这项工作提出了改进的体系结构的实现,用于同时生成和相互正交的序列互补集。通过利用生成和相关算法中的一些冗余,减少了资源消耗,并改善了此类体系结构的性能。对使用通用参数执行的FPGA实现进行了评估,并与先前的建议进行了比较。

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