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VLIW processor for H.264: Integer transform and Quantization

机译:适用于H.264的VLIW处理器:整数变换和量化

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As the performance of mobile devices increases, a demand for watching high quality videos in those devices also increases. VLIW (Very Long Instruction Word) processors have been used as a coprocessor to accelerate the performance of various CODECs in the embedded systems, e.g. TI Davinci, but the general VLIW has too much redundancies if the applications required to be executed on the VLIW are restricted. In this paper, we propose a VLIW processor focused on the DCT and Quantization of H.264. Our proposed architecture has 4 issue slots and 16 bit width data path which is half of the TI''s TMS320C6× series, but performs better than the TMS320C6× series in terms of cycle count and throughput.
机译:随着移动设备性能的提高,在这些设备中观看高质量视频的需求也随之增加。 VLIW(超长指令字)处理器已被用作协处理器,以加速嵌入式系统中各种CODEC的性能,例如。 TI达文西(TI Davinci),但是如果要求在VLIW上执行的应用程序受到限制,则常规VLIW会有太多冗余。在本文中,我们提出了一种VLIW处理器,其重点是DCT和H.264的量化。我们提出的体系结构具有4个发布时隙和16位宽度的数据路径,这是TI TMS320C6×系列的一半,但在周期数和吞吐量方面却比TMS320C6×系列更好。

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