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Application of digital pulse delay device in range-gated control for range-gated imaging lidar

机译:数字脉冲延迟装置在距离门控成像激光雷达的距离门控中的应用

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Digital pulse delay device is one of the key techniques of range-gated imaging lidar. At present, Digital method and analog method are the two main implementations of pulse delay device. Digital method is mainly achieved by counter or FIFO memory. With the development of Complex Programmable Logic Device (CPLD), the digital delay device can be achieved with a single chip of CPLD. With this method, the digital delay device enjoys the advantages of high integration, high reliability and strong ability of anti-electromagnetic interference. However, since the maximum clock frequency of CPLD is limited, the improvement of temporal resolution is restricted. Analog method is mainly realized by the delay-line, which is one of the dedicated integrated circuit. Using this method, a higher time resolution can be arrived. In this paper, the timing characteristics of the delay signal are analyzed. Three design options are presented and the advantages and deficiencies are discussed. Based on the theoretical analysis and numerical simulation, the digital delay device combined with the delay chip AD9501 and Field Programmable Gate Array (FPGA) is chosen because of its large dynamic range and high accuracy. Besides, the output pulse width can be adjusted conveniently. The digital delay device is simulated and the result shows that the delay control for range-gated imaging lidar is feasible.
机译:数字脉冲延迟器是测距激光雷达的关键技术之一。目前,数字方法和模拟方法是脉冲延迟器的两个主要实现。数字方法主要通过计数器或FIFO存储器实现。随着复杂可编程逻辑设备(CPLD)的发展,数字延迟设备可以通过CPLD的单个芯片来实现。通过这种方法,数字延迟器具有集成度高,可靠性高,抗电磁干扰能力强的优点。但是,由于CPLD的最大时钟频率受到限制,所以时间分辨率的提高受到限制。模拟方法主要是通过延迟线实现的,该延迟线是专用集成电路之一。使用此方法,可以达到更高的时间分辨率。本文分析了延迟信号的时序特性。提出了三种设计方案,并讨论了优点和缺点。在理论分析和数值模拟的基础上,选择了数字延迟器,并结合了延迟芯片AD9501和现场可编程门阵列(FPGA),因为它具有较大的动态范围和较高的精度。此外,输出脉冲宽度可以方便地调节。对数字延迟器进行了仿真,结果表明,对距离门控成像激光雷达的延迟控制是可行的。

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