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A Fully Qualified Top-Down and Bottom-Up Mixed-Signal Design Flow for Non Volatile Memories Technologies

机译:用于非易失性存储器技术的完全合格的自上而下和自下而上的混合信号设计流程

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The wide range and rapid increase in the complexity of EDA tools demand proven and safe design flows. This paper presents a complete and fully qualified mixed-signal top-down design flow for non volatile memory applications. It has been successfully applied to an Embedded Flash Macrocell based design as well as to a 14-bit analog/digital converter with digital non linearity compensation manufactured in 0.18um proprietary flash technology. One remarkable feature of the proposed methodology is the high level of integration among EDA tools from different vendors and internally developed solutions. Mixed-signal domain has been really explored at any level: functional, behavioural, vhdl/schematic and post layout with parasitic components. Furthermore, we propose a bottom-up methodology to generate and validate VHDL-AMS models for IP analog cells. All the illustrated features are integrated in a design flow which provides full compatibility and flexibility between analog and digital design steps to cutdown time-to-design, improve time-to-market and streamline design quality.
机译:EDA工具复杂性的广泛范围和快速增长要求经过验证的安全设计流程。本文介绍了用于非易失性存储器应用的完整且完全合格的混合信号自上而下的设计流程。它已成功应用于基于嵌入式闪存宏单元的设计以及以0.18um专有闪存技术制造的具有数字非线性补偿的14位模/数转换器。所提出的方法的显着特征是来自不同供应商的EDA工具与内部开发的解决方案之间的高度集成。混合信号领域已经在各个层面上得到了真正的探索:功能,行为,vhdl /示意图以及带有寄生元件的后期布局。此外,我们提出了一种自下而上的方法来生成和验证IP模拟单元的VHDL-AMS模型。所有图示的功能都集成在设计流程中,该流程在模拟和数字设计步骤之间提供了完全的兼容性和灵活性,从而缩短了设计时间,缩短了上市时间并简化了设计质量。

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