首页> 外文会议>Optical Microlithography XXI >AltPSM contact hole application at DRAM 4Xnm nodes with dry 193nm lithography
【24h】

AltPSM contact hole application at DRAM 4Xnm nodes with dry 193nm lithography

机译:采用干式193nm光刻技术在DRAM 4Xnm节点上的AltPSM接触孔应用

获取原文

摘要

To avoid expensive immersion lithography and to further use existing dry tools for critical contact layer lithography at 4Xnm DRAM nodes the application of altPSM is investigated and compared to attPSM. Simulations and experiments with several test masks showed that by use of altPSM with suitable 0°/180° coloring and assist placement 30nm smaller contacts can be resolved through pitch with sufficient process windows (PW). This holds for arrays of contacts with variable lengths through short and long side pitches. A further benefit is the lower mask error enhancement factor (MEEF). Nevertheless 3D mask errors (ME) consume benefits in the PW and the assist placement and coloring of the main features (MF) put some constraints on the chip design. An altPSM compatible 4Xnm full-chip layout was realized without loss of chip area. Mask making showed very convincing results with respect to CDU, etch depth uniformity and defectiveness. The printed intra-field CD uniformity was comparable to attPSM despite the smaller target CDs. Room for improvement is identified in OPC accuracy and in automatic assist placement and sizing.
机译:为了避免昂贵的浸没式光刻,并进一步使用现有的干式工具在4Xnm DRAM节点上进行关键接触层光刻,我们对altPSM的应用进行了研究,并将其与attPSM进行了比较。使用几个测试掩模进行的仿真和实验表明,通过使用具有适当0°/ 180°着色的altPSM并辅助放置30nm,可以通过具有足够工艺窗口(PW)的间距来解决较小的触点。这适用于通过短边和长边间距而具有可变长度的触点阵列。另一个好处是较低的掩码错误增强因子(MEEF)。尽管如此,3D掩膜错误(ME)消耗了PW的好处,主要特征(MF)的辅助放置和着色给芯片设计带来了一些限制。实现了与altPSM兼容的4Xnm全芯片布局,而不会损失芯片面积。掩模制造在CDU,蚀刻深度均匀性和缺陷方面显示出令人信服的结果。尽管目标CD较小,但印刷的场内CD均匀性与atPSM相当。在OPC准确性以及自动辅助放置和调整大小方面都存在改进的空间。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号