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Principal Pilot Line Manufacturing Challenges and Solutions in Direct Fabrication of a-Si:H TFT Arrays on Flexible Substrates

机译:直接在柔性基板上制造a-Si:H TFT阵列的主要中试线制造挑战和解决方案

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Principal challenges to direct fabrication of high performance a-Si:H transistor arrays on flexible substrates include automated handling through bonding-debonding processes, substrate-compatible low temperature fabrication processes, management of dimensional instability of plastic substrates, and planarization and management of CTE mismatch for stainless steel foils. In collaboration with our industrial and academic partners, we have developed viable solutions to address these challenges, as described in this paper.
机译:在柔性基板上直接制造高性能a-Si:H晶体管阵列的主要挑战包括:通过键合剥离工艺进行自动处理,与基板兼容的低温制造工艺,塑料基板尺寸不稳定性的管理以及CTE失配的平面化和管理用于不锈钢箔。如本文所述,我们与行业和学术合作伙伴合作,开发了可行的解决方案来应对这些挑战。

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