This work emphasizes room temperature deposition and fabrication of top-gated staggered structure ZnO-TFTs and integration of ZnO-TFT based simple logic circuits. We synthesized ZnO thin films by RF sputtering in an Ar/Oxygen ambience with no intentional heating of the substrates. The electrical, optical and structural properties of the ZnO thin films can be well-controlled by altering process parameters such as RF power density and relative Oxygen partial pressure. Typical deposition was carried out at a chamber pressure of 15 mTorr, Ar/Oxygen flow rates of 15 sccm/1 seem and RF power density of 3W/cm~2. The resistivity of the as-deposited films was between 10~4-10~6 Ω-cm with high optical transparency (>80%) in the visible spectrum and minimal surface roughness as detected by high-resolution AFM imaging. Gated van der Pauw and Kelvin-bridge structures were lithographically patterned to asses ZnO channel resistance. In the completed devices, a dual-stack (Ta_2O_5/SiO_2) dielectric layer was effective in suppressing gate-leakage current below 10 pA and enabled depletion-mode ZnO-TFT operation exhibiting hard saturation. A Ti/Au metallization scheme was adopted to provide good ohmic contact to ZnO. TFTs retained well-behaved transfer characteristics down to a channel length of 4 μm with on/off drain current ratio exceeding 10~5, threshold voltage between -15 V to -5 V and inverse sub-threshold slope of around 1.75 V/decade.
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