A Varactor-Less 10GHz CMOS LC-VCO for Optical Communications Transceiver SOCs Using Caged Inductors

摘要

A 40% frequency range LC-VCO for multi-standard optical communications SERDES SOCs was realized in 0.11mum CMOS. A tail-free CMOS amplifier having a large oscillating amplitude was used to minimize the VCO phase noise. The tank inductor has an octagonal patterned metal cage to shield it from the noise radiated by the digital side of the IC. A high resolution capacitor-DAC was used to bring the oscillating frequency within 0.1% of the target value, resulting in a sub-150MHz/V VCO gain. A virtually constant tuning-gain was achieved with a variable capacitance implemented with constant metal finger capacitors and FET voltage controlled resistors. This varactor-less LC-VCO can be implemented in any standard digital CMOS technology that has thick top metal layers. The supply pushing was reduced by balancing the positive voltage coefficient gate capacitances with the negative voltage coefficient drain diffusion capacitances. The power consumption was reduced to about half with a tuned load clock buffer. Supply noise up-conversion was minimized by implementing a low noise and high PSRR dual regulator that uses a V_T/R low noise reference