Ultra-wideband Quadrature LC-VCO using Capacitor-Bank and backgate topology with on-chip spirally stacked inductor in 0.13 μm RF-CMOS process covering S-C bands

摘要

Frequency tracking and synthesizer at the mm-wave range suffer an everlasting compromise between phase noise (PAT) performance and frequency tuning range (FTR) irrespective of the topology adopted. This work proposes an Ultra-Wide Band, Quadrature Voltage Controlled Oscillator (QVCO) employing an on-chip inductor and 8-Bit Capacitor-Bank (Cap-Bank) in addition to the MOS-Varactors, to bring in the best compromise between above two said constraints. The additional efforts are kept generating Quadrature operation and keeping the power dissipation in an optimized range. It is shown that unlike conventional current reuse and wider MOS topology, the proposed Cap-Bank array with scaled transistor-based switches effectively widens the tuning operation with a remarkable FTR up to 85.7%, covering the most frequently used wireless standards IEEE-802.11 a/b/g of Bluetooth and Wi-Fi in S and C bands respectively. The design has been implemented with 0.13 mu m RF-CMOS process in ADS (Keysight Technologies). The Back-Gate topology has been used with the cross-coupled differential structure which generates the quadrature phased signals well-shaped and with the least add on power dissipation. Use of a low-loss on-chip spirally stacked inductor, enhances the chip integrity, spectrum quality and improves Phase Noise performance, providing the best phase noise of -164 dBc/Hz a 1 MHz (near f(max)) at a power dissipation of 12 mW from 1.2 V supply. The VCO gain achieved for the entire range of 2.4-6 GHz, varies largely from 1332 MHz/V (near f(max) = 6 GHz) to 42 MHz/V (near f(max) = 2.4 GHz) for the coarse tuning of Cap-Bank.