首页> 外文会议>Interconnect Technology Conference, 2004. Proceedings of the IEEE 2004 International >PECVD low-k SiOC (k=2.8) as a cap layer for 200nm pitch Cu interconnect using porous low-k dielectrics (k=2.3)
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PECVD low-k SiOC (k=2.8) as a cap layer for 200nm pitch Cu interconnect using porous low-k dielectrics (k=2.3)

机译:PECVD低k SiOC(k = 2.8)作为使用多孔低k电介质(k = 2.3)的200nm间距Cu互连的覆盖层

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摘要

This work proposes a use of PECVD low-k carbon-doped SiO2 (SiOC) as a cap layer for 200nm pitch Cu interconnects using high-modulus porous MSQ (k=2.3) to reduce the low-k void formation and the effective dielectric constant (keff). The mechanism of void suppression is due to the high permeability of SiOC film for fluorine (F), which is incorporated I p-MSQ during damascene etching. The elimination of voids by application of SiOC cap layer is confirmed by FIB analysis as well as the electrical characteristics. The keff value of 200nm pitch Cu/p-MSQ interconnects is reduced using SiOC cap layer, which is in good agreement with the calculation. Thus, this process is promising for the reliable porous ultra low-k for the 65nm node and beyond.
机译:这项工作提出使用PECVD低k碳掺杂的SiO2(SiOC)作为200nm节距的铜互连的盖层,使用高模量多孔MSQ(k = 2.3)来减少低k空隙的形成和有效介电常数(keff)。抑制空隙的机制是由于SiOC膜对氟(F)的高渗透性,在镶嵌腐蚀期间将其掺入I p-MSQ中。通过FIB分析以及电学特性证实了通过施加SiOC覆盖层而消除的空隙。使用SiOC覆盖层可以降低200nm间距的Cu / p-MSQ互连的keff值,这与计算结果非常吻合。因此,该工艺有望为65nm及以后的节点提供可靠的多孔超低介电常数。

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