End-user applications requiring advanced semiconductor products continue to increase. Along with this increase has come the need for more complex and functional forms of device packaging. Foremost among these growing advanced packaging techniques is the use of wafer bumping and wafer level chip scale packaging. Because of the complex nature of these packaging techniques, the transition to wafer bumping and chip scale packaging has resulted in the migration of front-end manufacturing techniques into the traditional back-end manufacturing arena. Among the front-end manufacturing techniques in use for wafer bumping and wafer level CSP, photolithography remains one of the most critical steps. The rapid increase in chip density and I/O's as well as the implementation of multi-layer I/O redistribution requirements have resulted in the implementation of lithography processes similar to those used in the manufacturing of integrated circuits. These requirements have resulted in the proliferation of 1X Stepper lithography as the dominant method of image transfer for wafer bumping and wafer level CSP This paper will define the technology trends for wafer bump and wafer level CSP lithography and the upcoming needs in this area. The paper will highlight the need for advanced 1X stepper lithography techniques in wafer bumping and describe the benefits that these techniques bring to the advanced packaging community. It will also show the trends for growth in the wafer bump and wafer level CSP markets driven by the adoption of advanced packaging techniques in main stream semiconductor packaging applications.
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