On-chip protection

摘要

This workshop is intended for those individuals active in the area of "on-chip" ESD protection design and is an opportunity to discuss in an open forum the ESD problems facing the semiconductor industry now and in the future. The panel will be prepared to discuss such topics as the viability of existing protection methods and possible new protection methods of oxides thickness down to 25A, protection methods of R.F. circuits, "under the pad" protection circuits, and foundry ESD issues. The audience is encouraged to bring their experiences and problems to this session for a lively discussion.