首页> 外文会议>Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on >Low phase noise reference oscillator with integrated PMOS varactors for digital satellite receivers
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Low phase noise reference oscillator with integrated PMOS varactors for digital satellite receivers

机译:具有集成PMOS变容二极管的低相位噪声参考振荡器,用于数字卫星接收器

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For the first time, a low phase noise reference oscillator with integrated PMOS varactors is realized. Other integrated varactor options are qualitatively analyzed, and will be shown to fall short for application in a reference oscillator. Carrier to noise levels of 87 dBc/Hz @ 10 kHz offset and better are measured over a tuning range of 225 MHz to 310 MHz. Power supply voltage is 3.5 V and measured dissipation 14 mW. The design is optimized for use in zero-IF digital satellite front-ends which have a double loop tuning system. In double loop architectures a relatively noisy on-chip I/Q RC oscillator is wideband locked to a clean reference oscillator to achieve phase noise levels sufficiently low for QPSK reception. A low cost implementation of the reference oscillator is realized, since only the coils of the reference oscillator are off-chip.
机译:首次实现了具有集成PMOS变容二极管的低相位噪声参考振荡器。定性地分析了其他集成的变容二极管选件,这些选件将显示出在参考振荡器中的不足。在225 MHz至310 MHz的调谐范围内测得的载波噪声水平为10 dB偏移时更好的87 dBc / Hz。电源电压为3.5 V,测得的功耗为14 mW。该设计经过优化,可用于具有双环路调谐系统的零中频数字卫星前端。在双环路架构中,一个相对嘈杂的片上I / Q RC振荡器被宽带锁定到一个干净的参考振荡器,以实现对于QPSK接收而言足够低的相位噪声水平。由于仅参考振荡器的线圈在芯片外,因此实现了参考振荡器的低成本实现。

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