INtegrated silicon Hall devices are used to measure magnetic fields. Unformately, they can not be used in low field applications because they suffer from a large, unpredictable and drifting offset. Offset can be reduced to a few microtesla using the spinning-current method. This paper reports on the infleuence of the fabrication process, CMOS or bipolar, on the offset of spinning-current Hall plates. The depletion layer width of the unction, which is different for the two fabrication processes, can be infleucned by the bias current and the substrate voltage. The spinning-current principle drastically reduces the offset, independent of the bias current and substrate voltage, and therfore independent of the depletion layer width and fabrication method.
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