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Feasibility study to determine the suitability of using TiN/W and Si1-xGex as alternative gate materials for sub-0.1-um gate-length PMOS devices

机译:确定是否将TiN / W和Si1-xGex用作栅极长度小于0.1um的PMOS器件的替代栅极材料的可行性研究

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Abstract: In this paper we report on a simulation study on the impact of gate material on PMOS device performance. The gate materials studied were conventional poly-silicon gate, SiGe gate with varying Ge composition,and TiN/W metal gate. The motivation for alternative gate materials is to progressively alleviate or eliminate the poly depletion problem as observed with existing poly-silicon gate material, which becomes increasingly more important as the gate oxide becomes ultra thin (less than or equal to 26 Angstrom). Using these alternative gate materials, drive currents can be higher than those with conventional poly-silicon gate material, especially for PMOS devices where gate depletion is more pronounced. Two types of PMOS device designs were studied: (1) a high- performance design which is characterized by a maximum off current of 1nA/micrometer, and (2) a low-power design characterized by a maximum off current of 10 pA/micrometer. A plus or minus 10% variation in gate length is allowed for the high-performance design, and a larger variation for the low- power design. The minimum allowed gate length is 0.09 micrometer in both cases. Key results obtained from this study are as follows. First, use of TiN gate material results in a 30% improvement in pMOS nominal drive current compared to conventional poly-Si gate pMOS devices for the low-power device design, and a 15% pMOS nominal drive current improvement for the high-performance device design. Second, use of SiGe gate material results in a 25% improvement in nominal pMOS drive current compared to conventional poly-Si gate pMOS for the low-power device design, and a 13% pMOS nominal drive current improvement for the high-performance device design. !7
机译:摘要:在本文中,我们报告了有关栅极材料对PMOS器件性能的影响的仿真研究。研究的栅极材料为常规的多晶硅栅极,具有变化的锗成分的SiGe栅极和TiN / W金属栅极。替代栅极材料的动机是逐步减轻或消除现有多晶硅栅极材料所观察到的多晶硅耗尽问题,随着栅极氧化物变得超薄(小于或等于26埃),多晶硅耗尽问题变得越来越重要。使用这些替代栅极材料,驱动电流可能会比使用常规多晶硅栅极材料的驱动电流高,尤其是对于栅极耗尽更为明显的PMOS器件而言。研究了两种类型的PMOS器件设计:(1)以最大截止电流为1nA /μm为特征的高性能设计,以及(2)以最大截止电流为10 pA /μm为特征的低功耗设计。高性能设计允许门长度正负10%的变化,而低功耗设计则允许较大的变化。在这两种情况下,最小允许栅极长度均为0.09微米。从这项研究中获得的主要结果如下。首先,与低功率器件设计的传统多晶硅栅极pMOS器件相比,使用TiN栅极材料可使pMOS额定驱动电流提高30%,而对于高性能器件,则将pMOS额定驱动电流提高15%设计。其次,与用于低功率器件设计的常规多晶硅栅极pMOS相比,使用SiGe栅极材料可使标称pMOS驱动电流提高25%,而对于高性能器件设计则可提高13%pMOS标称驱动电流。 !7

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