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100-nm defect detection using an existing image acquistion system

机译:使用现有图像采集系统100nm缺陷检测

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For obvious cost reasons, semiconductor manufacturers are constantly striving to produce ever smaller wafer geometries with the current installed base of wafer steppers. Many techniques have been used successfully to 'squeeze' more resolution from these steppers than was once thought possible. Wafers processed using non-aggressive k$-1$/ factors provided a linear correlation between mask and wafer feature sizes. However, it has been shown that pushing k$- 1$/ factors to very low levels causes a nonlinear response between changes in photomask and wafer critical dimension. This non-linearity demands extremely tight photomask CD control specifications. Total CD errors 50nm and smaller can cause unacceptable wafer CD variation. In this paper, defect sensitivity and false detection performance of a new advanced line measurement algorithm was tested. The test vehicles included both an industry standard and a custom designed programmed defect test mask. In addition, production masks with naturally occurring localized CD errors that caused wafer pattern bridging were analyzed. This new experimental algorithm has shown localized CD error detection of $LSEQ 100 nm reticle defects.
机译:出于明显的成本原因,半导体制造商不断努力生产具有电流安装的晶片步脚的晶圆几何形状。许多技术已经成功地使用,以“挤压”从这些挺杆上的更多分辨率而不是曾经认为可能的。使用非侵略性K $-$ /因素处理的晶片提供了面罩和晶片特征尺寸之间的线性相关性。但是,已经表明,将k $ - 1 $ /因素推向非常低的水平导致光掩模和晶片关键尺寸的变化之间的非线性响应。这种非线性需要极其紧密的光掩模CD控制规范。总CD误差50nm和更小可能导致不可接受的晶片CD变化。在本文中,测试了新的高级线路测量算法的缺陷灵敏度和假检测性能。测试车辆包括行业标准和自定义设计的编程缺陷测试掩码。此外,分析了具有导致晶片图案桥接的天然存在的局部CD误差的生产掩模。这种新的实验算法显示了$ LSEQ 100 NM掩模界面的本地化CD错误检测。

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