Interconnection issues for vertical-to-surface-transmission electrophotonic device (VSTEP) optoelectronic information processing systems

摘要

Abstract: We simulate parallel and serial implementations of functions on VSTEP (vertical to surface transmission electro-photonic device) based digital optical computing architectures. Taking optical thyristors as representative devices, we find that intrinsic fan-in and fan-out losses negate many of the speed advantages of the parallel implementation. However, in the regime where VSTEP rise- and fall-times are of the same order as transcription time the parallel solution becomes more attractive. !10