Interconnection scheme for improved high speed ICs

摘要

In this paper, a technology based on the Bonded Etch-back Silicon On Insulator (BESOI) technique is proposed which employs a highly conductive layer buried beneath the insulating oxide layer, and therefore is advantageous for high frequency ICs. No additional mask level is required and the necessary technological steps can be done by the wafer manufacturer. The design freedom is hardly limited.