A novel incremental procedure for the hierarchical assembly of macro test specifications into a chip test program is presented. To solve test generation/application problems, a bottom-up symbolic test assembly procedure that proceeds in line with the construction of the system is proposed. It is shown that for a modular design approach, this procedure can be extended with design-for-testability features to ensure that all macro tests are assembled into a chip test program. The approach is exemplified by the design of a decimation filter for a Sigma / Delta A/D (analog-to-digital) converter.
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机译：提出了一种新的增量程序，用于将宏测试规范分层组装到芯片测试程序中。为了解决测试生成/应用程序的问题，提出了一种自下而上的符号测试组装过程，该过程与系统的构造一致。结果表明，对于模块化设计方法，可以使用可测试性设计功能扩展此过程，以确保将所有宏测试组装到芯片测试程序中。该方法以Sigma / Delta A / D（模数）转换器的抽取滤波器的设计为例。
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