The authors report research concerning the effects of inaccurate silicon processing on integrated circuits. To acquire information about defective processing steps, electrical measurements applied to defect monitors or product yield modules (PYMs) are proposed. The authors describe two such PYMs derived from a 128K SRAM matrix, as well as the kinds of measurements that should be carried out and the way they should be evaluated to obtain defect density data for yield prediction. In addition, the authors present some new theoretical results concerning the actual ability of defect monitors to deliver reliable results. They also consider the complexity of the measuring procedure. It turns out that, depending on the flexibility of the experimental setup, this complexity is more significantly dependent on the number of defects to be detected than on the complexity of the monitor structure.
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