cache storage; consumer electronics; instruction sets; system monitoring; system-on-chip; RTL implementation; SoC; academic ARM7 processor core; bypass mode; cost efficient real-time program trace compression; dictionary feature; hardware resource; on-chip debugging; on-chip instruction cache; on-chip monitoring solution; online mode; trace support circuit; trace-capable instruction cache; cache; compression; program trace; real time;
机译:具有跟踪功能的指令高速缓存,可在SoC中实现经济高效的实时程序跟踪压缩
机译:实时多线程嵌入式处理器中共享缓存的低成本,高能效线程冲突检测方案
机译:嵌入式系统中用于实时,不干扰且具有成本效益的程序跟踪的缓存和预测器
机译:具有跟踪功能的指令高速缓存,可在SoC中实现经济高效的实时程序跟踪压缩
机译:用于实时压缩程序轨迹的算法和硬件结构。
机译:将指令预取与部分缓存锁定相结合以改善实时系统中的WCET
机译:用于快速指令缓存模拟的指令跟踪压缩