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Advances in High Performance RDL Technologies for Enabling IO Density of 500 IOs/mm/layer and 8-μm IO Pitch Using Low-k Dielectrics

机译:利用低k电介质实现500 IOs / mm /层和8μmIO间距的IO密度的高性能RDL技术的进展

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Currently, the IC industry has been steadily advancing towards 7 nm and 5 nm nodes with further reductions projected in the near future to progressively create large number of inputs and outputs (IOs) at finer pitch. Today the high-density interconnect (HDI) organic redistribution layer (RDL) can only achieve an IO density of about 40 IOs per mm per layer with line and space of 6 μm and microvia diameter of 20 μm at 50 μm pitch. However, to achieve further increases in IO density, RDL with 1 μm routing lines and spaces together with 1 to 2 μm diameter microvias are required. Such advances in the RDL technology are of great importance to accomplish IO densities of 500 IOs/mm/layer to enable high bandwidths of 500 Gb/s at low cost. In this paper we present the latest progress at the Packaging Research Center, Georgia Institute of Technology in the following 4 key areas.1. Fine line photolithography: Various methods that can achieve 1 μm critical dimension (CD) are discussed and recent results on 1 μm L/S using both dry film and liquid photoresists together with advanced lithographic tools are presented.2. Small microvia creation: Microvia is the most important barrier limiting the RDL to achieve high IO density and fine IO pitch. In this paper, microvia diameter scaling down to 2 μm along with the feasibility to achieve 1 μm and via pitch of 4 to 8 μm using both photo and picosecond pulsed UV laser will be presented.3. Low Dk and Low Df dielectric materials: Dielectric material layers are an important part of RDL. For achieving multi-functional high speed and/or low loss systems and modules, dielectric layers with low Dk and/or low Df materials are critical. The material requirements, availability and process challenges will be addressed in this paper.4. Process methodology: The semi-additive process (SAP) has been the process of record for RDL fabrication. In this paper, the conventional SAP and its modifications such as modified-SAP (m-SAP) and advanced SAP (a-SAP) together with alternative organic damascene process (ODP) along with back-end- of-line (BEOL) will be reviewed and compared.Finally, considerations for future trends are presented.
机译:当前,IC行业一直在稳步向7 nm和5 nm节点发展,并计划在不久的将来进一步缩小其规模,从而以较小的间距逐步创建大量的输入和输出(IO)。如今,高密度互连(HDI)有机再分布层(RDL)只能实现每层每mm约40 IOs的IO密度,线间距为6μm,间距为50μm的微孔直径为20μm。但是,为了进一步提高IO密度,需要具有1μm布线和间隔以及1至2μm直径微孔的RDL。 RDL技术的此类进步对于实现500 IOs / mm /层的IO密度以低成本实现500 Gb / s的高带宽至关重要。本文介绍了佐治亚理工学院包装研究中心在以下四个关键领域的最新进展:1。细线光刻:讨论了可以达到1μm临界尺寸(CD)的各种方法,并给出了使用干膜和液体光致抗蚀剂以及先进的光刻工具在1μmL / S上获得的最新结果。2。产生微小的微通道:微通道是限制RDL实现高IO密度和精​​细IO间距的最重要的障碍。本文将介绍微通孔直径缩小到2μm,以及使用光和皮秒脉冲UV激光器实现1μm和4至8μm通孔间距的可行性。3。低Dk和低Df介电材料:介电材料层是RDL的重要组成部分。为了实现多功能的高速和/或低损耗系统和模块,具有低Dk和/或低Df材料的介电层至关重要。材料需求,可用性和工艺挑战将在本文中解决。4。工艺方法:半加成工艺(SAP)是RDL制造的记录过程。在本文中,传统的SAP及其修改,如修改的SAP(m-SAP)和高级的SAP(a-SAP),以及替代的有机镶嵌工艺(ODP)和后端(BEOL)最后,提出了对未来趋势的考虑。

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