Considerations on a Smart Strategy for Simultaneously Testing Multiple PCB Assemblies in Board Level Vibration

摘要

Board level vibration testing is an important characterization aspect that has to be considered during development and release of electronic components in applications involving harsh environments. Industrial reliability test standards prescribed by JEDEC recommend to stress a statistical representative sample size of at least 30 components. Consequently, the test execution time is undesirably long when testing all components sequentially. This paper provides a solution by developing a vibration test approach for simultaneously stressing multiple PCB assemblies. To start with, multiple boards are evaluated via vibrational spectrum analysis that is combined with a Finite Element Model (FEM) to calculate the strain at solder joint level. Limited variation is seen in calculated strain levels from PCB to PCB. This permits simultaneous testing of multiple PCB assemblies. Consequently, three test capacity expansion arrangements, namely One Dimensional (1D), Two Dimensional (2D: Stacked & Side by Side) & Three Dimensional (3D) test methods are evaluated. When comparing the investigated test extension strategies, it is found that test approach with stacked PCB levels alter the stress transferred to the component and can lead to a false reliability prediction. Depending upon the allowed mass load limit of the shaker system and stress levels involved, both 1D and 3D techniques can be used as complementary to one another. Outcomes of this study can further be used to provide guidance for future board level vibration test method.