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LFTSM: Lightweight and Fully Testable SEU Mitigation System for Xilinx Processor-Based SoCs

机译:LFTSM:适用于基于Xilinx处理器的SoC的轻巧且可完全测试的SEU缓解系统

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Field-Programmable Gate Arrays (FPGAs) provide a cutting-edge platform for meeting the performance, cost, dependability, and flexibility requirements of on-board data processing in mission-critical and safety applications. However, commercial off-the-shelf SRAM-based FPGAs are susceptible to radiation-induced Single Event Upsets (SEUs). The detection and mitigation of SEUs is, therefore of paramount significance. SEU mitigation techniques such as Triple Modular Redundancy (TMR) and configuration scrubbing are well known. However, these techniques either provide high resource overheads or utilize resources that are themselves susceptible to SEUs. In this work, we propose a Lightweight and Fully Testable SEU Mitigation system–LFTSM that combines high-speed Xilinx FPGA internal configuration repair mechanism with a robust external scrubber in processor cores, targeting SEUs in SRAM-based Xilinx SoC FPGAs (Zynq). The internal repair mechanism corrects single-bit upsets and notifies external scrubber when multi-bit upsets are detected. Multi-bit upsets are classified and repaired by the external scrubber. Our proposed LFTSM system aims to achieve reliability in resource-intensive FPGA application systems providing minimal resource utilization with less than 1% resource overheads (on XC7Z020 FPGA) and the widest fault coverage. Our system provides the smallest resource utilization in comparison to other solutions in the literature and offers full testing control in compliance with Automotive Safety Integrity Level (ASIL); a risk classification standard defined by the ISO 26262. Our solution neither requires the usage of external memories nor third-party tools. We implemented the LFTSM system on Xilinx Zynq SoC (with XC7Z020 FPGA). We validated the fault detection efficiencies of our design using fault injection testing with complete control over the number and locations of error injections in the configuration memory. For the XC7Z020 device, LFTSM scans all configuration bits in multiple microseconds, detects upsets within 8ms and then corrects single-bit and multi-bit upsets in further few milliseconds. We successfully integrated and tested the proposed LFTSM system with the industrial resource-hungry application systems for automotive.
机译:现场可编程门阵列(FPGA)提供了一个前沿平台,可满足关键任务和安全应用中机载数据处理的性能,成本,可靠性和灵活性要求。但是,基于SRAM的商用现货FPGA容易受到辐射引起的单事件翻转(SEU)的影响。因此,SEU的检测和缓解至关重要。 SEU缓解技术(例如三重模块冗余(TMR)和配置清理)是众所周知的。但是,这些技术要么提供高资源开销,要么利用本身容易受到SEU影响的资源。在这项工作中,我们提出了一种轻量级且可完全测试的SEU缓解系统–LFTSM,该系统将高速Xilinx FPGA内部配置修复机制与处理器内核中强大的外部洗涤器相结合,针对基于SRAM的Xilinx SoC FPGA(Zynq)中的SEU。内部修复机制可纠正单个位的不正常现象,并在检测到多位的不正常现象时通知外部洗涤器。多位爆料由外部洗涤器分类和修复。我们提出的LFTSM系统旨在在资源密集型FPGA应用系统中实现可靠性,从而提供最小的资源利用率以及少于1%的资源开销(在XC7Z020 FPGA上)和最大的故障覆盖率。与文献中的其他解决方案相比,我们的系统提供的资源利用率最低,并提供全面的测试控制,以符合汽车安全完整性等级(ASIL); ISO 26262定义的风险分类标准。我们的解决方案既不需要使用外部存储器,也不需要第三方工具。我们在Xilinx Zynq SoC(带有XC7Z020 FPGA)上实现了LFTSM系统。我们使用故障注入测试验证了我们设计的故障检测效率,并完全控制了配置存储器中错误注入的数量和位置。对于XC7Z020器件,LFTSM会在数微秒内扫描所有配置位,在8ms内检测到颠簸,然后再在几毫秒内纠正单位和多位颠簸。我们成功地将拟议的LFTSM系统与用于汽车的工业资源匮乏的应用系统进行了集成和测试。

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