首页> 外文会议>IEEE VLSI Test Symposium >LSTM-based Analysis of Temporally- and Spatially-Correlated Signatures for Intermittent Fault Detection
【24h】

LSTM-based Analysis of Temporally- and Spatially-Correlated Signatures for Intermittent Fault Detection

机译:基于LSTM的时空相关签名的间歇故障检测分析

获取原文

摘要

Intermittent faults are a critical reliability threat in deep submicron VLSI circuits. These faults occur non-deterministically due to unstable hardware and unpredictable operating conditions; they are activated/deactivated with changes in the runtime environment. Online fault prediction models are commonly used to predict soft errors and aging effects. A small set of flip-flops, whose states constitute the signature, conveys information about the fine-grained behavior of the circuit, and serves as the input to a machine-learning (ML) model. The nondeterministic failure mechanisms of intermittent faults, however, result in temporally- and spatially-correlated signatures (TSC-signatures). Moreover, the high-dimensional time-series features impede the use of traditional ML models for intermittent-fault detection. To cope with this challenge, we adapt the TSC-signatures to existing ML detection models. Moreover, we propose a novel detection model based on Recurrent Neural Network with Long Short-Term Memory (LSTM) that is inherently suitable for this problem. Simulation results for the ITC99 benchmark circuits highlight the effectiveness of the proposed model.
机译:在深亚微米VLSI电路中,间歇性故障是严重的可靠性威胁。由于硬件不稳定和不可预测的运行状况,这些故障不确定地发生。通过运行时环境的更改激活/禁用它们。在线故障预测模型通常用于预测软错误和老化效应。一小部分触发器,其状态构成签名,传达有关电路细粒度行为的信息,并用作机器学习(ML)模型的输入。但是,间歇性故障的不确定性故障机制会导致时间和空间相关的签名(TSC签名)。此外,高维时间序列特征阻碍了将传统ML模型用于间歇性故障检测。为了应对这一挑战,我们将TSC签名修改为现有的ML检测模型。此外,我们提出了一种基于带有长短期记忆的递归神经网络的新型检测模型,该模型固有地适用于此问题。 ITC99基准电路的仿真结果突出了所提出模型的有效性。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号