Design and Demonstration of 1µm Low Resistance RDL Using Panel Scale Processes for High Performance Computing Applications

摘要

This paper presents for the first time the latest challenges and solutions to enable electronics packaging redistribution layer (RDL) scaling to 1µm and beyond. The focus on RDL scaling for this paper is on how to scale semi-additive processing (SAP) for next generation high performance computing applications such as 2.5D Interposers. This paper combines novel next generation photoresist materials developed by Tokyo Ohka Kogyo Co., LTD. (TOK) and process innovations to the traditional SAP process. Traditionally, challenges in scaling SAP are related to seed layer etching and photoresist materials selection. This paper address both of these challenges by exploring various seed layer metals and the potential impact they can have on the SAP process flow for enabling SAP scalability as well as novel photoresist development with TOK. Scaling dry films to have similar performance to a matching liquid photoresist is demonstrated in this paper. The 3D Systems Packaging Research Center remains one of the leaders in package RDL scaling and this paper discusses at length recent advancements that have been made to enable silicon like RDL scaling on glass panels.