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A Wide-band Reference-less Bidirectional Continuous-Rate Frequency Detector

机译:宽带无参考双向连续频率检测器

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This paper presents a wide-band half-rate frequency locked loop (FLL) circuit in 180 nm CMOS process. The bidirectional FLL includes a coarse frequency detector (CFD) and a fine frequency detector (FFD) to automatically detect a change in input data rate, acquires the new frequency without the need for an external reference clock or any programming. A modified CFD is proposed to reduce the frequency acquisition time. The simulation shows the FLL achieves wide lock range of 400Mb/s-to-2.6Gb/s and frequency acquisition time of 1.73 μs.
机译:本文提出了一种采用180 nm CMOS工艺的宽带半速率锁频环(FLL)电路。双向FLL包括一个粗糙频率检测器(CFD)和一个精细频率检测器(FFD),可自动检测输入数据速率的变化,无需外部基准时钟或任何编程即可获取新频率。提出了一种改进的CFD,以减少频率获取时间。仿真显示,FLL实现了400Mb / s至2.6Gb / s的宽锁定范围和1.73μs的频率获取时间。

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