Modeling and Design of a 3D Interconnect Based Circuit Cell Formed with 3D SiP Techniques Mimicking Brain Neurons for Neuromorphic Computing Applications

摘要

Neuromorphic computing that physically mimics human brain, is considered as one of the rebooting computing frontiers, promising in far-reaching applications like machine learning. Progress in research on memristor-based synapses has far exceeded that on neurons and interconnects. Also as the essential parts in physical implementation of brain-inspired computing, neuron circuit cell and interconnects may both greatly benefit from the high flexibility and parallelism of 3D heterogeneous integration technologies based on TSV (through semiconductor/substrate via). In this paper, a 3D circuit cell mimicking a brain neuron is first proposed, featuring TSVs with cross-sections distinct from those for signal or power transmission between device strata. These so-called "neural TSVs", with co-axial Cu filling, oxide liners and N+ doped outer plate, are used as input coupling capacitors to a MOS transistor on the same Si active interposer or that on a chip surface-mounted onto a passive interposer. TSVs and the transistor together compose a neuron MOSFET, which acts as a capacitive threshold summator and is further combined with a CMOS inverter to create a 3D neuron circuit cell. Analytical models are established, and electromagnetic field simulations are used to reveal the parasitics. Then, the behavior of the design is analyzed with HSPICE simulators. At last, a Rosenblatt perceptron is designed to demonstrate the network-level functionality of the neuron cell. A further integration of the discussed neuron circuit cell, memristor synapses, and 3D TSV-based interconnects may enable a highly intricate and flexible 3D network, implementing a brain-inspired 3D SoC.