Hardware design of Euclidean Projection modules for ADMM LDPC decoding

摘要

The ADMM decoding is a novel LP-based algorithm that can improve the decoding performances of the conventional BP decoding algorithms for LDPC codes. However, it was shown that the Euclidean projection (EP) computation involved in the ADMM algorithm limits the throughput performances of the ADMM hardware decoders and drastically increases their silicon cost. Recently, different techniques have been proposed in the literature at the algorithmic level to improve the hardware characteristics of the EP module without penalizing the error correction performances of the ADMM decoder. In this article, we present the implementation results of optimized hardware design of these theoretical approaches. Then, an evaluation of their real interest for high throughput and low complexity ADMM LDPC decoder design is provided.