Advanced defect inspection techniques for NFET and PFET defectivity at 7nm gate poly removal process

摘要

During 7nm gate poly removal process, polysilicon is removed exposing both NFET and PFET fins in preparation for high-k gate oxide. If the polysilicon etch is too aggressive or the source and drain are not sufficiently protected, the etch can damage the active region and render the FET inoperative. Different materials are used in the active region for NFET and PFET that have different susceptibility to the polysilicon etch. To sufficiently monitor this defect, we must have good detection of damaged active regions on both PFET and NFET. However, PFET and NFET regions have very different optical noise characteristics due to varying levels of process uniformity. In addition, the distance between NFET and PFET has continued to shrink with the design rule, making evaluating each independently with optical inspection tools increasingly difficult. In this paper, we introduce new techniques to independently monitor both NFET and PFET defectivity, with improved performance over current methods.