首页> 外文会议>IEEE International Symposium for Design and Technology in Electronic Packaging >Design Rule Checking. Current Challenges Approached With HyperLynx DRC
【24h】

Design Rule Checking. Current Challenges Approached With HyperLynx DRC

机译:设计规则检查。 HyperLynx DRC应对当前的挑战

获取原文

摘要

The technology invades out life every day. The constantly increasing comfort, the better quality of life that we have been meeting for the last decade are strongly based on the everyday equipment that we use and rely on. The Internet of Things concept brings on the discussion small parts and even smaller boards than even the parts should populate. The problem of space on the printed circuit boards correlated with higher frequency of the signals moved around the project defines specific high-speed issues represented by the crosstalk, overshoots, undershoots, reflections etc. The electrical signal geometry is suffering transformations and eventually the whole project might fail. Such high-speed issues might be avoided if rules are set before the routing process or accurate verifications are run. This paper is focused on how HyperLynx DRC from Mentor Graphics can point out design problems at the virtual prototype of the printed circuit board. It is superior to the regular design rule checker build in any printed circuit board solution.
机译:该技术每天都在侵袭生命。过去十年来,我们不断满足的舒适感和更高的生活质量,很大程度上取决于我们使用和依赖的日常设备。物联网概念引发了讨论,甚至是小部分甚至是小部分,甚至超过了这些部分所应该容纳的部分。印刷电路板上的空间问题与在项目中移动的信号的较高频率相关,定义了由串扰,过冲,下冲,反射等代表的特定高速问题。电信号的几何形状正在发生变化,最终使整个项目陷入困境可能会失败。如果在路由过程或运行精确验证之前设置了规则,则可以避免此类高速问题。本文的重点是Mentor Graphics的HyperLynx DRC如何指出印刷电路板虚拟原型中的设计问题。它优于任何印刷电路板解决方案中的常规设计规则检查器。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号