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Don’t Correct the Tags in a Cache, Just Check Their Hamming Distance from the Lookup Tag

机译:不要更正缓存中的标签,只需检查它们与查找标签的汉明距离

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This paper describes the design of an efficient technique for correcting errors in the tag array of set-associative caches. The main idea behind this scheme is that for a cache tag array protected with ECC code, the stored tags do not need to be corrected prior to the comparison against a lookup tag for cache hit/miss definition. This eliminates the need for costly hardware to correct the cache tags before checking for a hit or a miss. The paper reveals the various optimizations needed to translate this idea into a design that delivers a practical improvement in a product. An analysis of our design, as compared to state of the art methods, shows that it can provide the same correction and detection strength with less area, power and timing overheads and better performance. An Intel Core® microprocessor is implementing this technique in its second level and third level caches.
机译:本文介绍了一种有效的技术设计,该技术可以纠正集合关联缓存的标记数组中的错误。该方案背后的主要思想是,对于受ECC代码保护的缓存标签阵列,在与用于缓存命中/未定义的查找标签进行比较之前,不需要对存储的标签进行校正。这消除了在检查命中或未命中之前不需要昂贵的硬件来校正高速缓存标签的麻烦。本文揭示了将这种想法转化为可对产品进行实际改进的设计所需的各种优化方法。与最先进的方法相比,我们的设计分析表明,它可以提供相同的校正和检测强度,而面积,功耗和时序开销却更少,并且性能更高。英特尔®酷睿™微处理器正在其第二级和第三级缓存中实施此技术。

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