Via Staggering Loss in Substrate Integrated Waveguides

摘要

The loss contributions of a Substrate Integrated Waveguide (SIW) with staggered vias is investigated and quantified using precision simulations. Besides choosing an appropriate substrate material and cladding smoothness, the main design factor to reduce SIW loss is to increase the substrate thickness. As the substrate thickness increases, the requirements for manufacturability force the use of larger diameter vias, which forces the staggering of the SIW via-wall to reduce the side-wall leakage. The gaps in the staggered vias degrades the purity of the TE ₀₁ mode causing additional loss at discrete frequencies. Being cognisant of these effects fosters improved SIW design, including configuration and materials usage.