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Wafer Form Warpage Characterization Based on Composite Factors Including Passivation Films, Re-Distribution Layers, Epoxy Molding Compound Utilized in Innovative Fan-Out Package

机译:基于包括钝化膜,再分布层,创新型扇出封装中的环氧模塑化合物在内的复合因素的晶片形态翘曲特性

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Traditional IC packaging requires chips to be assembled at the same level, while recently thrived 2.5D/3D IC packaging utilizes skyscraper approach to stack various types of chips with diverse functions occupying similarfootprint, and this approach not only can reduce overall package size, but also can improve electrical interconnection performance. The primary difference between 2.5D/3D IC lies in the implementation of medium wafer with Through Silicon Vias (TSV), called Through Silicon Interposer (TSI). Although 2.5D IC packaging possesses the advantages of low power consumption, high data bandwidth, great electrical performance, and miniaturized form factor, the challenges of huge investment required on technology development and process manufacturing comparing to traditional 2D IC can't be ignored. Therefore, numerous innovative concepts have been proposed to reduce the cost on TSI fabrication, including but not limited to, different method of electrical interconnection, cheaper interposer utilization from material point of view, or even reconsideration of the necessity of interposer. One of the latest approaches is to utilize Fan-Out (FO) configuration to fully remove the requirement of interposer and use Epoxy Molding Compound (EMC) notonly as encapsulation of functional dies but also as structure supporter for further assembly processes. The above approach utilizes multi-layer structure composed of passivaton (PSV) layers and Re-Distribution Layers (RDL) on a carrier as frontside process supporter, and subsequent compound molding process is implemented to supportbackside process after the removal of carrier mentioned herein. For multiple processes and materials involved in fabricating diverse kinds of packages, one of the most important technical difficulties is warpage control. Since warpage behavior of the multi-layer structure directly influences the workability of both bumping and assembly processes, it's extremely crucial to control warpage in advance to ensure smooth subsequent wafer handling and processing afterwards. In order to have desirable warpage at final stage, the material properties and mechanicalbehaviors of individual materials within this multi-layer structure should be further investigated and characterized. There were much efforts dedicated on the warpage characterization of different types of composite structures in the past few years, and we have also demonstrated our research progress previously regarding warpage control from numerous diverse factors at bumping process stage, including carrier types, PSV layer material types, PSV layer thickness, PSV layer quantities, and RDL pattern density. These crucial factors have been discovered and proven to affect warpage to a different extent at bumping process stage. In our latest studies, the scope of warpagecharacterization is further expanded and widened and specifically focused on post-bumping assembly processes, including compound molding and grinding process. The parameters of EMC, including but not limited to, material type, Coefficients of Thermal Expansion (CTE), thickness, shrinkage ratio, and EMC ratio within the whole package. The correlation between warpage and these factors are elaborated and discussed in this paper. With these findings, wafer warpage of the entire composite structure composed of PSV films, RDLs, and EMC are characterized andcomprehensive understanding about the effects of different factors can be obtained and thus assist us in warpage modeling for different types of newly-developed innovative packages in the years to come.
机译:传统的IC封装要求将芯片组装在同一水平上,而最近蓬勃发展的2.5D / 3D IC封装则采用摩天大楼式方法来堆叠各种类型的,具有类似功能且功能相似的芯片,这种方法不仅可以减小总体封装尺寸,而且还可以减小封装尺寸。可以改善电气互连性能。 2.5D / 3D IC之间的主要区别在于使用硅通孔(TSV)来实现中等晶圆的实现,称为硅通孔(TSI)。尽管2.5D IC封装具有低功耗,高数据带宽,出色的电气性能和小型化的优点,但是与传统的2D IC相比,在技术开发和工艺制造方面需要巨额投资的挑战是不容忽视的。因此,已经提出了许多创新的概念来减少TSI的制造成本,包括但不限于不同的电互连方法,从材料角度出发更便宜的中介层利用率,甚至重新考虑中介层的必要性。最新方法之一是利用扇出(FO)配置完全消除中介层的要求,并使用环氧模塑化合物(EMC)不仅用作功能性模具的封装,而且还用作进一步组装过程的结构支撑物。上述方法利用由载体上的钝化层(PSV)层和再分布层(RDL)组成的多层结构作为前侧工艺支撑物,并且在去除本文所述的载体之后,实施后续的复合成型工艺以支撑后侧工艺。对于涉及制造各种包装的多种工艺和材料,翘曲控制是最重要的技术难题之一。由于多层结构的翘曲行为直接影响凸点和组装过程的可加工性,因此预先控制翘曲以确保随后的晶圆后续处理和加工极为重要。为了在最终阶段具有理想的翘曲,应该进一步研究和表征这种多层结构内单个材料的材料性能和机械性能。在过去的几年中,人们为研究不同类型的复合结构的翘曲特性付出了很多努力,并且我们先前也已经证明了我们在碰撞过程阶段从众多不同因素(包括载流子类型,PSV层材料类型)的翘曲控制方面的研究进展。 ,PSV层厚度,PSV层数量和RDL图案密度。这些关键因素已被发现并证明在颠簸过程阶段会在不同程度上影响翘曲。在我们的最新研究中,翘曲特征化的范围进一步扩大和扩展,并且特别侧重于凸点后组装过程,包括复合成型和磨削过程。 EMC的参数,包括但不限于材料类型,整个包装内的热膨胀系数(CTE),厚度,收缩率和EMC比。本文详细阐述并讨论了翘曲与这些因素之间的关系。有了这些发现,就可以表征由PSV薄膜,RDL和EMC组成的整个复合结构的晶片翘曲,并且可以全面了解不同因素的影响,从而有助于我们对不同类型的新型创新封装进行翘曲建模。未来的岁月。

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