Ab-initio modeling of self-heating in single-layer MoS2 transistors

摘要

Since the first experimental demonstration of a field-effect transistor (FETs) based on a single-layer (SL) MoS2 channel [1], this material as well as other members of the transition metal dichalcogenide (TMD) family have received a wide attention as potential replacement for Silicon at the end of the semiconductor roadmap. While the electronic characteristics of TMD FETs have been extensively investigated, showing excellent electrostatic controls, high I/I current ratios, and decent mobility values, their thermal and electro-thermal properties have so far remained largely unexplored. It has however been demonstrated in Ref. [2] that power/heat dissipation might be a severe performance limiting factor in next-generation logic switches. This concerns even more 2-D crystals such as SL MoS, for which a reduced heat sinking is expected, as compared to bulk structures [3]. To provide a theoretical insight into this issue, we performed the first electro-thermal quantum transport simulations of ultra-scaled SL MoS transistors, as in Fig. 1(a), where both the electron and phonon populations are treated at the ab-initio level. The key findings (formation of local hot spots close to the drain side and peak lattice temperatures much higher than in Si devices under similar operating conditions) qualitatively agree with recent experimental results [4] and reveal that heat management could be the bottleneck of the SL MoS technology.