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Improvements for Gate-Hiding Garbled Circuits

机译:栅极隐藏乱码的改进

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Garbled circuits have been highly optimized for practice over the last several years. Today's most efficient constructions treat different types of gates (e.g., AND vs. XOR) differently; as such, they leak the type of each gate. In many applications of garbled circuits, the circuit itself is public, so such leakage is tolerable. In other settings, however, it is desirable to hide the type of each gate. In this paper we consider optimizing garbled circuits for the gate-hiding case. We observe that the best state-of-the-art constructions support only a limited class of gate functions, which turns out to undermine their improvements in several settings. These state-of-the-art constructions also require a non-minimal hardness assumption. We introduce two new gate-hiding constructions of garbled circuits. Both constructions achieve the same communication complexity as the best state-of-the-art schemes, but support a more useful class of boolean gates and use only the minimal assumption of a secure PRF.
机译:在过去的几年中,乱码电路已针对实践进行了高度优化。当今最有效的构造对不同类型的门(例如AND与XOR)的处理方式有所不同;因此,它们泄漏了每个浇口的类型。在乱码电路的许多应用中,电路本身是公共的,因此这种泄漏是可以容忍的。但是,在其他设置中,希望隐藏每个门的类型。在本文中,我们考虑针对门隐藏情况优化乱码电路。我们观察到,最好的最新结构仅支持有限种类的门功能,这实际上破坏了它们在几种设置中的改进。这些最新的构造还要求非最小硬度假设。我们介绍了两种新的隐藏电路的门隐藏结构。两种结构都实现了与最佳最新方案相同的通信复杂性,但是支持更有用的布尔门类,并且仅使用安全PRF的最小假设。

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