Abstract instructions for MIPI C-PHY production feasibility in PCB layout assisted by simulation software

摘要

MIPI Alliance has developed C-PHY specification which with a higher rate and application level than the past version, such as the current market Camera CMOS Image sensors, Display Driver ICs, Application processor for Mobile devices; all need to use this protocol in the future. MIPI C-PHY has a high potential in signal transmission applications. It utilizes three lines of two highly coupled to achieve the same anti-noise capability as traditional differential signals, and uses back-end processing to significantly increase signal transmission rate to 2.28 times the D-PHY. C-PHY must be designed to strict conditions : 3-wire, any two to 100 ohms; each line of 50 ohm, so the layout will be a big challenge, how to design PCB stack up and arrange trace layout is testing layout team and PCB manufacturers design capacity. This paper explores how to develop a C-PHY layout rule and implement it on a PCB board, followed by simulation software to compare the bandwidth and eye diagrams of various layout ways to find the most appropriate design approach. Theoretically: the perfect C-PHY is equidistant to each other, and each 50 ohms, two for the 100 ohm height coupling, so keep the traditional differential pair anti-noise ability. In fact: it is difficult to equidistant with each other and precise control of the impedance, and the upper and lower layers of the amount of noise received is different, so the ability to resist noise slightly worse than the traditional differential pair, but the difference is not too large. In order to achieve the three-wire coupling structure on the PCB board, it is important to ensure that the PCB manufacturer can make it. To achieve a highly coupled triangular C-PHY structure, how to choose between process feasibility and signal integrity is the focus of this article.