Design of high-speed real-time sensor image processing based on FPGA and DDR3

摘要

Field-Programmable Gate Array (FPGA) plays a very important role in sensor data acquisition and processing with its rich interface resources and excellent parallel processing ability. In general, the FPGA is responsible for driving the sensor, processing the pixel data in parallel and then transfer the pixel data to the upper computer. However, with the high speed and real-time requirements of image acquisition system, color image processing by traditional personal computer (PC) cannot achieve the maximum video display frame rate. This problem is obvious for those of high resolution sensors. At the same time, the pixel data transmission between the FPGA and PC will become unstable and then make frame lost when the frame rate increases. Given the advantage of FPGA in parallel processing, this design will implement sensor video processing pipeline (VPP) with the FPGA, and select the technically mature, large capacity, high speed storage device double data rate (DDR3) to cache image data. The experimental result shows that the FPGA-based video pipeline processing and DDR3 frame cache application can increase the video frame rate and improve the transmission stability of video data.